ISO IEC 18372-2004 PDF

Full title and description

ISO/IEC 18372:2004 — Information technology — RapidIO(TM) interconnect specification. This International Standard specifies the RapidIO architecture and protocol set for a high-performance, low-pin-count, packet-switched system-level interconnect intended for chip-to-chip and board-to-board communications in networking, telecommunications and high-performance embedded systems.

Abstract

The RapidIO architecture provides a scalable, low-latency, high-bandwidth packet-switched interconnect supporting globally shared memory, message passing and software-managed programming models. It targets intra-system fabrics (chip-to-chip and board-to-board) with GByte/s class data rates and features for high-performance I/O and low-latency communications.

General information

• Status: Published (International Standard confirmed).
• Publication date: December 2004 (published 15 December 2004).
• Publisher: ISO/IEC (published as an international standard by ISO in cooperation with IEC).
• ICS / categories: 35.100.30 (network/communication layers / interconnection of IT equipment).
• Edition / version: Edition 1 (2004).
• Number of pages: ~405 pages (some distributor listings show a slightly different page count such as 399).

Primary bibliographic details and disposition are recorded by ISO; some national and commercial distributors (IEC webstore and national bodies) list minor differences in page count and presentation.

Scope

This standard defines the RapidIO interconnect specification covering the physical/transport characteristics, packet formats, routing, addressing and communication protocols required for high-performance, packet-switched intra-system fabrics. It is intended to standardize chip-to-chip and board-level interconnects used in networking, telecom and embedded computing platforms.

Key topics and requirements

• Architecture overview and design goals: low pin count, packet-switched fabric, scalable performance.
• Physical layer and link protocols: electrical/physical signaling and link management.
• Packet formats and transaction types: read/write, messaging, exception and control packets.
• Routing, addressing and switching behaviors for board-to-board topologies.
• Quality-of-service, error handling, flow control and low-latency mechanisms.
• Software models: shared memory and message-passing programming support.

These technical topics are specified in detail across the standard’s chapters and normative tables.

Typical use and users

Primary users include system architects, ASIC/SoC and board designers, embedded systems engineers, and integrators working on high-performance networking, telecom equipment, signal-processing systems and other embedded platforms that require low-latency, high-bandwidth on-board interconnects. The specification is also used by test labs and standards implementers.

Related standards

Related work includes other ISO/IEC JTC 1/SC 25 publications on interconnection and interface standards, and vendor/industry RapidIO specifications and extensions maintained by the RapidIO community and trade association. Implementers commonly reference physical-layer, MAC and transport standards when integrating RapidIO into multi-protocol systems.

Keywords

RapidIO, interconnect, packet-switched fabric, intra-system, chip-to-chip, board-to-board, low-latency, high-bandwidth, shared memory, message passing, ISO/IEC 18372

FAQ

Q: What is this standard?

A: ISO/IEC 18372:2004 is the international standard that formalizes the RapidIO interconnect architecture and protocol set for high-performance system-level fabrics.

Q: What does it cover?

A: It covers the RapidIO architecture, packet formats, link/physical layer definitions, routing and addressing, flow control, error handling and software models (shared memory and messaging) needed to implement RapidIO-based interconnects.

Q: Who typically uses it?

A: System architects, SoC/ASIC designers, board and embedded system engineers, test labs and vendors building high-performance networking, telecom and embedded platforms use this standard as the authoritative specification for RapidIO.

Q: Is it current or superseded?

A: The ISO record lists ISO/IEC 18372:2004 as a published international standard (first edition 2004) and subject to periodic review; implementers should check ISO/IEC publications or national standards bodies for any amendments, confirmations or later editions. Some distributors note minor bibliographic differences (e.g., page counts).

Q: Is it part of a series?

A: It is part of the family of interconnection and interface standards handled by ISO/IEC JTC 1/SC 25; it also aligns with industry RapidIO specifications and ecosystem documents maintained outside ISO (trade association and vendor materials).

Q: What are the key keywords?

A: RapidIO, interconnect, packet-switched fabric, low-latency, high-bandwidth, shared memory, message passing, ISO/IEC 18372.