IEC 61691-3-3:2001 PDF
Behavioural languages - Part 3-3: Synthesis in VHDL
Behavioural languages - Part 3-3: Synthesis in VHDL
- Статус документа:
- Отменён
- Формат:
- Электронный (PDF)
- Количество страниц:
- 48
- Дата публикации:
- 28 июня 2001 г.
- Издание:
- IEC IS 61691 edition 1 version 1
- ICS:
- 35.240.50
This standard supports the synthesis and verification of hardware designs, by defining vector types for representing signed or unsigned integer values and providing standard interpretations of widely used scalar VHDL values. Includes package bodies, as described in annex A, which are available in electronic format either on a diskette affixed to the back cover, or as a downloadable file from the IEC Web Store.
Технические детали
- Технический комитет
- TC 91 - Electronics assembly technology
- SKU
- IEC 61691-3-3:2001