PD IEC/TR 63051:2017 PDF

Documentation on design automation subjects. Mathematical algorithm hardware description languages for system level modeling and verification (HDLMath)

Название (английский):

PD IEC/TR 63051:2017

Documentation on design automation subjects. Mathematical algorithm hardware description languages for system level modeling and verification (HDLMath)

Статус документа:: Действующий
Формат:: Электронный (PDF)
Дата публикации:: 10 января 2017 г.
ICS:: 25.040.01
SKU:: PD IEC/TR 63051:2017

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Abstract

What is PD IEC/TR 63051 – HDLMath for system modelling and verification about?

Around the world, engineers in industries such as electronics and automobiles are developing many kinds of systems and products. However, these are developed based on conventional design processes and suffer from many design problems and long design times. Because the laws of nature can be expressed mathematically, mathematics is a good algorithmic method for the description and modelling of such systems. Mathematical modelling is also an important approach for both solving problems and visualizing the abstract concepts involved. A hardware description language provides a means to describe the behaviour of a system precisely and concisely. PD IEC/TR 63051 describes the main functional requirements for Mathematical algorithm hardware description languages (HDLMath) for system-level modelling and verification and compares existing HDLMath languages from the viewpoint of designers.

PD IEC/TR 63051:2017 PDF

Abstract

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Abstract

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