Overview
IEC 61188-5-8:2007 - Printed board and printed board assemblies: Attachment (land/joint) considerations - provides guidance on land pattern geometries for area array components including BGA, FBGA, CGA, and LGA. The standard covers recommended land sizes, shapes and tolerances for terminations in the form of solder balls, solder columns or protective coated lands, with the objective of ensuring reliable solder joints while allowing for inspection, testing and rework. IEC 61188-5-8 is intended to be read in conjunction with IEC 61188-5-1:2002.
Key topics and technical requirements
- Land pattern geometries: Recommended land shapes (e.g., circular, hexagonal, dog-bone, via-in-pad) and courtyard considerations to support manufacturing requirements.
- Area array families: Specific guidance for square and rectangular BGA, FBGA, CGA and LGA components.
- Termination types: Dimensions and considerations for solder balls, solder columns and coated lands.
- Solder joint fillet design: Guidance on fillet geometry for both non-collapsing (level 2) and collapsing (level 3) terminations.
- Land pattern dimensioning: Dimension tables and identification numbers for robust land patterns; dimensions are derived from a mathematical tolerance model and are primarily intended for solder paste application + reflow soldering.
- Process considerations: Notes on reflow process control (must exceed liquidus temperature of chosen solder alloy) and compatibility with lead-free and tin-lead processes.
- Non-solder-mask-defined (NSMD) lands: Land descriptions in the standard are NSMD; users should account for solder resist aperture, land extensions, and via placement.
Practical applications
- PCB footprint definition for area array components (BGA/FBGA/CGA/LGA).
- Design-for-manufacturing (DFM) checks to ensure solder joint reliability, inspectability and reworkability.
- Assembly process planning (reflow profiles, paste stencil design) and failure analysis.
- Contract manufacturers and OEMs standardizing footprints and land patterns across product families.
Who should use this standard
- PCB designers and CAD librarians defining footprints and pad geometries.
- Assembly and process engineers developing reflow and solder paste processes.
- Reliability and test engineers validating solder joint integrity under thermal/mechanical stress.
- Purchasing and component engineers specifying area array devices and land-pattern requirements.
Related standards
- IEC 61188-5-1:2002 (Generic requirements for land pattern dimensioning) - IEC 61188-5-8 should be read in conjunction with this part for courtyard and tolerance methodology.
Keywords: IEC 61188-5-8, land pattern, BGA, FBGA, CGA, LGA, solder joint, surface mount, reflow soldering, area array, NSMD, lead-free.